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ECE482

ECE482 (Digital IC Design) is a 3-credit-hour senior level course that satisfies the Technical Electives requirement for ECE majors. It is offered only in the fall.

Content Covered

  • MOSFET device modeling and characteristics
  • Static properties of CMOS inverters
  • Propagation delay
  • Introduction to HSPICE and Cadence
  • MOSFET parasitic capacitances
  • Inverter delay minimization, superbuffers
  • Static CMOS logic gate design and layout
  • Elmore delay
  • Logical effort method
  • Alternate combinational logic families
  • Dynamic logic
  • Sequential logic
  • Low power design techniques
  • Semiconductor memory

ECE482 covers a great deal of concepts relevant to custom digital integrated circuit design. ECE482 begins with MOSFET I-V modeling, reviewing the long channel model from ECE342 and introducing the short channel model and the unified model, the latter of which is used for manual analysis in the rest of the course. CMOS inverters are then introduced and analyzed in great detail in the first half of the course. First, the static properties of CMOS inverters are covered, including CMOS inverter voltage transfer characteristics and static power dissipation. Propagation delay of CMOS inverters is then covered, including methods of estimating propagation delay using manual analysis, which involves modeling and linearization of parasitic capacitances in MOSFETs and CMOS inverters.

Around this time, simulation of digital circuits using HSPICE and layout of digital circuits using Cadence Virtuoso are introduced. HSPICE and Cadence will be used heavily in future problem sets and the final project after this point. Dynamic power dissipation in static CMOS logic gates is covered. Methods of minimizing propagation delay are discussed, including the use of superbuffers.

With these key concepts established, the course then moves to design of static CMOS logic gates, including sizing of transistors for worst case delay. Layout of CMOS logic gates using Euler paths and stick diagrams is introduced. Methods of approximating and minimizing propagation delay in digital circuits are then covered, including the Elmore delay model and logical effort method. Alternate combinational logic families are discussed, including pseudo-nMOS and pass-transistor/transmission gate logic.

ECE482 then moves to dynamic logic design, challenges faced when implementing dynamic logic, such as charge sharing, and their solutions. The domino logic and np-CMOS dynamic logic techniques are covered. Static and dynamic sequential logic is then covered, including static D-latches, C²MOS latches and registers, and TSPC latches and registers. The use of pipelining for multi-stage sequential logic circuits is covered. The minimization of delay due to interconnect parasitics using buffers is then covered, along with a distributed RC model for interconnects. Various low power design techniques are then introduced. The course concludes with semiconductor memory, including ROM (and ROM decoders), SRAM, DRAM, and flash memory design.

Prerequisites

The only official prerequisite is ECE342. It is important to take ECE342 before taking this course, as concepts such as MOSFET DC analysis and CMOS logic design will carry over. Additionally, taking ECE340 - Semiconductor Devices before taking this will be quite useful for understanding many of the concepts in this course, including modeling and characteristics of MOSFETs and CMOS inverters, propagation delay, and semiconductor memory. Though it is not an official prerequisite, students are expected to have already taken ECE340, and ECE340 and semiconductor device physics concepts are referenced throughout the course.

When to Take it

Take this course if you have an interest in integrated circuits, VLSI design, or semiconductor processing. This course is generally taken by seniors and graduate students in electrical engineering specializing in integrated circuits, though some ambitious computer engineers also take this course. As this course is time consuming, do not take this course with other time consuming courses so that you have enough time to work through the homeworks and the final project. The earliest this course can be taken is in the junior year; if you wish to take this course as soon as possible, take ECE342 and, ideally, ECE340 as soon as possible.

Course Structure

ECE482 has a heavy workload. Homework is assigned weekly, including during exam weeks. The problem sets can take a long time to complete, typically around 8 to 15 hours. They generally involve a mix of manual calculations, layout using Cadence, and simulation using HSPICE.

In addition to the homeworks, the course has two midterm exams and one final exam. The exams are typically challenging, consisting of a mix of conceptual questions, analysis problems, and design problems.

In the last month of the course, a time consuming final project is released, involving the design, layout, and simulation of an assigned digital integrated circuit. Students are assigned groups of 4 by the professor to complete this project. In the Fall 2023 semester, students were tasked with designing a serializer-deserializer circuit, along with a PRBS generator for testing and off-chip driver for off-chip signaling, and laying out the circuit in the 45 nm process. The difficulty of the homework assignments is lowered once the final project is released.

Expect to spend 10-15 hours a week on this course and significantly more after the final project is released.

Instructors

Recently, this course has been taught by Professor Rosenbaum, who is very experienced in the fields of integrated circuit design and semiconductor device modeling.

Course Tips

Do not skip lecture, not even once. Lecture recordings are not available until before each exam. Since some topics in the course are not covered in the textbook, it can be difficult to complete the homework without attending lecture.

For the homeworks, it is important to go through the assigned reading in the textbook before attempting any problem, to attend office hours, and to start early, so that there is adequate time to complete them. Working diligently through the homeworks and doing them well will be very helpful for the final project.

When studying for exams, it is helpful to go through the provided practice exam, and past homework problems. However, since a significant portion of each exam tests your conceptual understanding, just going through practice problems will likely not be enough to do well, which is why it is important to also go through the assigned textbook readings and your lecture notes conscientiously.

For the final project, it is highly recommended to start right away and get as much as possible done before Thanksgiving break, so that there is adequate time to complete it along with the report. Do not let the deadline sneak up on you, as the project requires a significant amount of time to complete, which should be spread out over the month or so during which the project is assigned.

Life After

Students who have taken ECE482 are well prepared for industry or graduate study in integrated circuits. With regards to future coursework, students should consider other integrated circuits courses, including ECE425 - Intro to VLSI System Design and ECE483 - Analog IC Design, as well as semiconductor courses, including ECE441 - Physics and Modeling of Semiconductor Devices and ECE444 - IC Device Theory & Fabrication.

Infamous Topics

  • Modeling of MOSFET parasitics - This portion of the course is the heaviest on semiconductor device physics, which some students are unfamiliar with.
  • Final project - The final project for ECE482 is notorious for its difficulty. Spend as much time on the final project as possible, so that you are able to get the most out of the course.

Resources

The required textbook, Digital Integrated Circuits: A Design Perspective, by J. M. Rabaey, A. Chandrakasan and B. Nikolic, is an excellent resource for this course. Doing the assigned readings from the textbook will strengthen your understanding of the course material.