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Finding an internship

Finding an Internship — ECE @ UIUC

A comprehensive, action‑oriented playbook for Grainger College of Engineering students who want paid, career‑relevant experience before graduation.

Table of Contents

1. Return on Investment: Why Intern?

  • Competitive Pay: Considerable compensation to aid in living expenses and tuition during the school year.
  • Faster Full‑Time Offers: Employers reported converting approximately 53% of their 2022-23 interns to full-time hires.
  • Skill Acceleration: hands‑on exposure to toolchains and technologies that are mentioned briefly in classes.
  • Clearer Career Path: Experience hardware vs. software vs. research before committing to a full‑time track.

2. UIUC Recruiting Calendar

Month What Happens Your Focus
Aug Companies post early‑bird apps (Apple, TI, Amazon) Finalize résumé, open Handshake alerts
Sept Engineering Career Fair (2 days @ ARC/Union) Attend both days; practice pitches
Oct 1st wave OAs & interviews 6‑week LeetCode/OA sprint
Nov–Dec Hardware firms (Qualcomm, AMD) finish hiring Follow up, negotiate, file CPT draft
Jan Spring Career Fair + Research Park internship fair Target startups, national labs
Feb–Mar Late‑stage hiring (startups, govt.) Send cold outreach; prep project demos
Apr–May Offer finalization & CPT filing Accept offers, complete ISSS forms

Tip: Keep a Trello board (Applied → OA → Interview → Offer) to track status and deadlines.

3. Résumé Deep‑Dive

Sections & Bullet Formula — Deeper Dive
Recommended order: Education → Experience → Projects → Skills (EEP‑S). Recruiters scan in this sequence to verify qualifications, impact, and tool match. A good example resume to use is Jake's Resume Template.

Section What to Include Pro Tips
Education Degree · Grad date · GPA (≥ 3.0) · Relevant 4–6 courses · Honors/Scholarships Highlight lab‑heavy courses (ECE 385, ECE 391) to prove hands‑on skill.
Experience Employer · Role · Dates · Location · 3–5 impact bullets Start with strongest action verb, quantify first metric, keep ≤ 2 lines each.
Projects Solo or team, coursework or personal, tech stack, 2–3 bullets Use GitHub link after title; emphasize “built” over “helped”.
Skills Languages, HW/SW tools, frameworks, soft skills (at most 2) Cluster by category: Languages, Hardware, Tools. Omit bar charts.

Impact‑First Bullet Formula (A‑T‑O‑M)
1. Action Verb –what you did (designed, automated, optimized)
2. Tool/Tech –how (Verilog, Python, LTspice)
3. Outcome Metric –result (‑35 % LUTs, +2 dB SNR, $8 k saved)
4. Method/Context –brief how/why (via pipelining, using DMA)

Template: to , .

Sample Bullets by Track
EE / Hardware – Redesigned buck converter PCB, reduced voltage ripple ‑22 % with synchronous rectification.
 CE / Embedded – Implemented UART DMA driver in C, cut CPU utilization ‑40 %, enabling 10 ksps sensor streaming.
CS / Software – Refactored Python ETL pipeline, improved throughput 4 ×* by caching DynamoDB responses.

Metric Cheat‑Sheet
| Metric | Examples | | --- | --- | | Performance | latency (ms), clock speed (MHz), FLOPS | | Resource | LUTs, BRAM, memory (MB), CPU % | | Quality | accuracy %, signal‑to‑noise ratio, test coverage | | Business | dollars saved/earned, users impacted, tickets closed |

Rule of Thumb: 1 number every 2 lines. If confidential, use relative numbers ("2 × faster", "‑35 % errors").

Power Verbs List – Adapt for creativity and leadership: architected, debugged, integrated, validated, orchestrated, accelerated, synthesized, parallelized, containerized, benchmarked.

UIUC Helpers
* VMock: instant feedback; aim ≥ 75 % score.
* ECS Drop‑ins @ ECEB 201:** 15‑min reviews, no appointment.

4. Portfolio & Online Presence

Platform Must‑Haves Nice‑to‑Haves
LinkedIn Headline ECE @ UIUC | FPGA & ML Enthusiast, custom URL, 3 skills Media: project demo video
GitHub Pinned repos: ECE 120 CPU, ECE 391 OS lab, personal side project GitHub Pages site with write‑ups
Personal Site /projects w/ images + lessons learned Blog (Jekyll/Hugo) reflecting on internships
Devpost / Hackathon Project description + slides Awards, press articles

5. Where to Find Opportunities

  1. Handshake → filter by Internship + ECE + CPT Eligible.
  2. Career Fairs → Fall, Spring, Startup, Research Park.
  3. Research Park → 800+ paid on‑campus R&D roles.
  4. Federal / National Labs → DoD SMART, NASA Pathways, Sandia SSGF.
  5. International → DAAD RISE Germany (hardware), Mitacs Canada.
  6. RSO Channels → Slack/Discord of IEEE, WIE, Illini Solar Car.
  7. Alumni Network → Illinois Alumni Mentoring Platform; filter by “Internship Hiring”.
  8. Cold Outreach → 80‑word email + résumé; ask for 15‑min call.

6. Networking That Works

  • Elevator Pitch Template: “Hi, I’m , a UIUC ECE junior focusing on embedded ML. Last semester I built  that . I’m excited about ’s . Could you share more about intern roles?”
  • Informational Interview Flow: Intro → Curiosity about career path → Insightful question → Thank‑you + connect on LinkedIn.
  • Professor Research Leads: Visit office hours with a 1‑page project proposal; ask about joining their ECE 396/397 group.
  • Relationship Tracking: Spreadsheet (Date, Contact, Next Steps). Update monthly.

7. Résumé Optimization for ATS & Recruiters

  • Keywords: Mirror top 10 nouns & verbs from job description (e.g., “UART”, “Verilog”, “debug”).
  • No Fancy Formatting: avoid text boxes, columns, graphics; use standard section headers.
  • File Type: PDF unless portal demands DOCX.
  • Validation Tools: Jobscan.ai (free via ECS), Rezi.ai (2 free exports).
  • Common Rejection Reasons: missing graduation date, GPA omitted, unreadable font.

8. Online Assessments (OAs)

Track Topics Primary Resources
EE (Hardware) Thevenin/Norton, BJT biasing, op‑amp stability, MOSFET switching, EMI All About Circuits quizzes · ECE 329 labs · Company‑specific Glassdoor Qs
CE (Embedded/Systems) FSMs, cache misses, pipelining, RTOS scheduling, C bit‑manipulation Nand2Tetris · Patterson & Hennessy review sheets · Intel FPGA workshops
CS (Software) Arrays & Hashmaps, BFS/DFS, DP, graphs, concurrency LeetCode Core 30 (below) · Grind 75 · NeetCode 150

8.1 LeetCode ― Core 30 Must‑Solve Problems
Cover every high‑frequency pattern asked by FAANG, AMD, Qualcomm, Citadel, etc.

# Problem (LC ID) Pattern Mastered
1 Two Sum (1) Hash Map / Arrays
2 Valid Parentheses (20) Stack
3 Merge Two Sorted Lists (21) Linked‑List pointers
4 Best Time to Buy & Sell Stock (121) Sliding Window
5 Binary Search (704) Binary Search template
6 Flood Fill (733) DFS/BFS
7 Lowest Common Ancestor BST (235) BST properties
8 Binary Tree Level Order Traversal (102) BFS Queue
9 Diameter of Binary Tree (543) DFS Tree
10 Maximum Subarray (53) Kadane / DP
11 Climbing Stairs (70) 1‑D DP
12 House Robber (198) 1‑D DP (adjacent)
13 Coin Change (322) Unbounded DP
14 Course Schedule (207) Topological Sort
15 Number of Islands (200) DFS/BFS Grid
16 Kth Largest Element in Array (215) Heap / Quickselect
17 Rotate Image (48) In‑place Matrix
18 Subsets (78) Backtracking
19 Permutations (46) Backtracking
20 Word Break (139) DP + Hash Set
21 Validate Binary Search Tree (98) In‑order Traversal
22 Serialize & Deserialize Binary Tree (297) Design / DFS
23 Search in Rotated Sorted Array (33) Binary Search variant
24 Minimum Window Substring (76) Sliding Window + Hash
25 Insert Delete GetRandom (380) Hash + Array design
26 Alien Dictionary (269) Graph + Topo sort
27 LRU Cache (146) Design — DLL + HashMap
28 Maximum Depth of Binary Tree (104) DFS
29 Reorder List (143) Linked‑List manipulation
30 Median of Two Sorted Arrays (4) Binary Search / Math

How to Use Core 30:
1. Solve untimed → write summary note.
2. Re‑solve two days later without notes.
3. Time yourself (30 min/problem) until 90 % test cases pass within limit.

8.2 6‑Week OA Training Plan
| Week | Focus | Volume | | --- | --- | --- | | 1 | Arrays + HashMaps | Core 30 #1‑#5 | | 2 | Trees & Graphs | #6‑#10 | | 3 | DP Fundamentals | #11‑#15 | | 4 | Advanced Graph / Heap | #16‑#20 | | 5 | Design Data Structures | #21‑#25 | | 6 | Mixed Timed Sets | Random 5 mediums/day |

Friday: take one full‑length mock OA (HackerRank practice sets).
Saturday: debrief; add mistakes to flash‑card doc.

8.3 Proctoring & Logistics Tips
Test your coding env ‑ same IDE theme, same shortcuts.
 Keep water & scratch paper; no phones in room.
* Read all constraints → choose data structure first → outline → code → test small, then corner cases.

9. Interview Mastery Interview Mastery

9.1 Behavioral

  • STAR‑L: Situation → Task → Action → Result → Learning.
  • Prepare 5 core stories (leadership, conflict, failure, technical win, innovation).
  • Research leadership principles (Amazon, Rivian) and weave them naturally.
  • End with 2‑3 tailored questions (team culture, project roadmap).

9.2 Technical

Track What They Ask How to Prepare
EE Draw a Fly‑back converter; explain duty cycle. ECE 342 notes, TI Power Lab
CE Design 4‑way set associative cache; calc hit rate. ECE 411, Logisim practice
CS Insert/Delete/GetRandom O(1) design; code it live. LeetCode ‑ Mediums, talk aloud

System Design (CE/CS):
1. Clarify requirements → 2. Draw high‑level block diagram → 3. Deep‑dive a component → 4. Bottlenecks & trade‑offs → 5. Summarize.

Virtual Setup:
Ethernet, 1080p cam, good lighting.
 White‑board app (Excalidraw) for diagrams.
* Mute Slack/email.

Follow‑up Email Template:

Subject: Thank you — {Role} Interview
Body: 3‑sentence thank‑you, one technical takeaway, reiterate enthusiasm.

10. Evaluating & Negotiating Offers

Factor What to Check
Pay Hourly rate, overtime rules, housing stipend, sign‑on bonus
Project Scope Ownership level, mentor availability, technologies used
Location Cost of living, public transit, company housing
Return Offer Likelihood Historical conversion %, opportunity for part‑time remote

UIUC Offer Policy: ECS‑participating companies must give ≥ 3 weeks to decide. Politely cite this if pressured.

Negotiation Steps:
1. Express excitement → 2. Present market data (ECS salary survey) → 3. Ask if rate is flexible → 4. Stop talking.

11. International Student Checklist

  1. Curricular Practical Training (CPT): must be integral to degree → register for ECE 298/397 if needed.
  2. Timeline: Apply 10 weeks before start; ISSS requires job offer + advisor letter.
  3. Co‑op Option: preserves F‑1 status; allows 8‑12‑month paid rotation.
  4. SSN & I‑9: apply within first week of work.
  5. Travel: need new I‑20 signature if re‑entering US during internship.

12. Special Scenarios

  • Freshmen: target Explore‑style programs (Google STEP, Meta PE, Microsoft Explore). Focus on RSOs + personal projects.
  • BS/MS 5‑Year: highlight grad‑level coursework; pursue advanced research internships (Intel Labs, NVIDIA Research).
  • Research‑to‑Industry Switch: translate publications to impact bullets; link code/data in portfolio.
  • Hardware‑Only Aspirants: prioritize Co‑op, Research Park hardware teams (John Deere, ADM).

✅ 1‑page, ATS‑clean résumé
✅ LinkedIn headline & 50+ connections
✅ GitHub portfolio with README screenshots
✅ Trello tracking board updated weekly
✅ 50 LeetCode mediums solved
✅ Mock behavioral recorded & reviewed
✅ ISSS CPT draft (if intl.)

Prepared by the HKN mentoring team. Questions? Good luck—start early, iterate fast, and leverage the Illini network!